About the Role
NVIDIA is looking for a driven Intern Physical Design Engineer to join our Physical Design team. This internship offers a unique opportunity to work on the physical implementation of NVIDIA's cutting-edge GPUs and SoCs. You will gain hands-on experience in various stages of the physical design flow, which may include floorplanning, power planning, place and route, clock tree synthesis (CTS), and static timing analysis (STA). You will work closely with experienced physical design engineers, RTL designers, and verification teams to achieve aggressive performance, power, and area targets. This role is ideal for students who are passionate about VLSI design, eager to learn about advanced semiconductor technologies, and want to contribute to the creation of high-performance silicon. You will have the chance to apply your academic knowledge to real-world challenges, develop critical industry skills, and contribute to the future of AI, data centers, and graphics.
Responsibilities
- Assist with various physical design tasks, including floorplanning and power planning
- Support place and route efforts for digital blocks
- Help with clock tree synthesis (CTS) and static timing analysis (STA)
- Contribute to design rule checking (DRC) and layout versus schematic (LVS)
- Learn and apply industry-standard EDA tools
Requirements
- Currently pursuing a BS or MS in Electrical Engineering, Computer Engineering, or a related field
- Familiarity with VLSI design concepts
- Basic understanding of physical design flow
- Knowledge of digital logic design principles
Qualifications
- Experience with scripting languages (e.g., Tcl, Perl, Python)
- Exposure to EDA tools (e.g., Synopsys, Cadence, Mentor Graphics)
- Coursework in physical design or semiconductor devices
- Strong analytical and problem-solving skills
Benefits
Not specified