About the Role
NVIDIA is seeking a Senior RTL Design Engineer with a focus on High-Speed I/O to contribute to the development of our next-generation GPUs and SoCs. This role is crucial for designing and implementing high-performance, power-efficient I/O solutions that meet the demanding requirements of NVIDIA's diverse product portfolio. You will be involved in the entire design flow, from micro-architecture definition and RTL coding to working closely with verification teams for robust validation and with physical design for optimal layout and timing closure. The ideal candidate will possess a strong foundation in digital design, a keen eye for detail, and the ability to innovate in a rapidly evolving technological landscape. This is an opportunity to be at the forefront of hardware design, enabling groundbreaking advancements in AI, data centers, and graphics.
Responsibilities
- Develop micro-architectures for high-speed I/O subsystems
- Perform RTL design and implementation using Verilog/SystemVerilog
- Collaborate with verification teams to ensure design correctness
- Work with physical design for efficient silicon implementation and timing closure
- Contribute to design documentation and reviews
Requirements
- BS or MS in Electrical Engineering or Computer Engineering
- 5+ years of experience in RTL design of complex digital circuits
- Demonstrated experience with high-speed serial interfaces (e.g., PCIe, CXL, NVLink)
- Proficiency in Verilog/SystemVerilog, Linting, CDC, and Synthesis flows
- Strong problem-solving and debugging skills
Qualifications
- Experience with custom analog IP integration
- Familiarity with advanced timing closure techniques
- Knowledge of design for testability (DFT)
- Experience with scripting languages (e.g., Python, Perl)
Benefits
Not specified