About the Role
NVIDIA's Silicon Co-Design Group (SCG) is actively seeking a highly skilled and versatile engineer to join their HW ArchDev team. This team holds a unique and crucial position, offering an end-to-end perspective on the entire product development lifecycle, spanning from initial architecture definition and bring-up to the final product release. The ArchDev arm serves as a central hub for all silicon and system-level feature development, conducting comprehensive cost-benefit analyses, devising system integration solutions, and ensuring system Power-On Reset (POR) alignment. In this role, you will be instrumental in defining the validation methodologies, design specifications, software/firmware requirements, and tooling necessary for robust hardware validation and the successful bring-up of next-generation silicon. Your contributions will directly and significantly impact the overall quality and reliability of NVIDIA's cutting-edge products.
Responsibilities
- Develop new end-to-end methodologies, processes, and workflows targeting system-level silicon stress, concurrency, and PVT coverage.
- Lead debug efforts from the HW side to root cause feature sequences bugs, silicon bugs, and sophisticated system-level issues caused by interactions between multiple HW and SW features.
- Drive SW team on system validation test development, automation and efficiency improvement.
- Bringup new flows, tests, and PVT solutions at Pre-si on N-1 or Emulation/FPGA platform.
- Apply insights from bring-up execution and post-action reviews to continually improve coverage.
Requirements
- BS or MS degree in EE/CE or equivalent experience
- Effective in a collaborative environment.
- 5+ years of experience in some of the following areas:
- Developing end-to-end silicon validation and stress testing, PVT methodologies for next-generation silicon
- Deep understanding of GPU/SOC system-level architecture
- Working experience with silicon active and low power features, boot, binning, PVT sensitivity, platform component losses
- Post silicon debug and evaluate fix options against product needs.
- Effective collaboration and communication across different functional teams.
- Experience in applying AI to semiconductor co-design/validation problems and learning the domain quickly.
- Knowledgeable in using AI-assisted workflows to accelerate automation, data analysis, root cause investigation, and documentation.
Qualifications
No explicit qualifications listed beyond requirements.
Benefits
- Competitive salaries
- Generous benefits package